Candidate processing workflow
Gerber/template registration → SSIM/difference → rotated-box detection or detailed segmentation
JIVISION offers project development and technical assessment for PCB, SMT, Solder-Joint and Electronics Assembly AOI. Scope: Component displacement, omissions, polarity, solder-joint and board-surface anomalies.
Component displacement, omissions, polarity, solder-joint and board-surface anomalies
Supply board revisions, component-substitution rules and reference boards; visual AOI does not replace hidden-joint or electrical continuity tests.
These are candidate implementation paths. Establish a baseline on real samples, then select or combine methods for imaging, speed and deployment constraints. Model names do not imply measured project results.
Gerber/template registration → SSIM/difference → rotated-box detection or detailed segmentation
Provide product variants, defect definitions and reference parts, acceptable and borderline samples, field of view, takt time, cameras/lighting and trigger/reject interfaces.
Board recipes, AOI algorithm, defect coordinates and review interface
Specify input formats, output fields, coordinates/units, error states, versions and invocation methods. Define review and failure handling. The statement of work determines the exact scope of source code, executables, model files or analysis reports.
Miss rate; false calls per board; smallest solder joint; registration residual
Separate test data by product, batch and defect class. Report misses, false calls, minimum visible conditions and line cycle time; test physical rejection separately.
These are measures to agree and test, not achieved-performance claims. Freeze samples, reference truth, thresholds and hardware/software versions before acceptance; report subgroup results and failures, identifying under-sampled conditions as uncovered.
Agree targets, stations, inputs and responsibilities in a statement of work, separating required and excluded conditions.
Use representative samples to test critical risks, document feasibility/failures and scope the next-stage estimate.
Implement agreed functions and interfaces with configuration/change records; use offline replay before authorized device or site integration.
Retest against individual measures and hand over contracted artifacts with known limits; manage maintenance, expansion and changeovers as subsequent work packages.
Image decisions cover visible features under agreed conditions; acceptable appearance does not establish material, strength, sealing or electrical conformity.
Candidate technologies are not license clearance. Check code, model weights, training data and dependency versions separately. Replace, license or exclude components unsuitable for the intended commercial delivery. Customer data is not used for public training by default.
Component displacement, omissions, polarity, solder-joint and board-surface anomalies. Deliverables: Board recipes, AOI algorithm, defect coordinates and review interface
Supply board revisions, component-substitution rules and reference boards; visual AOI does not replace hidden-joint or electrical continuity tests.
Task-specific measures: Miss rate; false calls per board; smallest solder joint; registration residual. Separate test data by product, batch and defect class. Report misses, false calls, minimum visible conditions and line cycle time; test physical rejection separately.
After reviewing samples for component displacement, omissions, polarity, solder-joint and board-surface anomalies, equipment conditions and interfaces, scope validation, development, deployment and acceptance separately. Data coverage, site changes and delivery rights affect the estimate; no fixed performance or schedule is promised before assessment.
Service ID: A04 · PCB, SMT, Solder-Joint and Electronics Assembly AOI
Describe available samples, equipment and target measures. Agree confidentiality and permissions before transferring sensitive or personal data through an approved channel.
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